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3314J-1-103E资料 | |
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3314J-1-103E PDF Download |
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Manufacturer:3314J-1-103E Description:Power Supply for the RF Section. Decoupling capacitors to the ground plane should be placed as close as possible to this pin. V DD1 should have a value of between 2.7 V and 5.5 V. V DD1 must have the same potential as VDD2. Power Supply for the RF Charge Pump. This should be greater than or equal to V DD1. In systems where VDD1 is 3 V, it can be set to 6 V and used to drive a VCO with a tuning range up to 6 V. Output from the RF Charge Pump. This is normally connected to a loop filter which drives the input to an external VCO. Ground Pin for the RF Digital Circuitry. Input to the RF Prescaler. This low level input signal is ac-coupled from the RF VCO. Ground Pin for the RF Analog Circuitry. RF/IF Fastlock Mode. Reference Input. This is a CMOS input with a nominal threshold of V DD/2 and an equivalent input resistance of 100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator. Digital Ground for the IF Digital, Interface and Control Circuitry. This multiplexer output allows either the IF/RF Lock Detect, the scaled RF, scaled IF or the scaled Reference Frequency to be accessed externally. Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input. Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is a high impedance CMOS input. Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the four latches, the latch being selected using the control bits. Connecting a resistor between this pin and ground sets the maximum RF and IF charge pump output current. The nominal voltage potential at the RSET pin is 0.66 V. The relationship between I CP and RSET is 13.5 ICP MAX = RSET So, with RSET = 2.7 kΩ, ICP MAX = 5 mA for both the RF and IF Charge Pumps. Ground Pin for the IF Analog Circuitry. Input to the RF Prescaler. This low-level input signal is ac-coupled from the IF VCO. Ground Pin for the IF Digital, Interface, and Control Circuitry. Output from the IF Charge Pump. This is normally connected to a loop filter which drives the input to an external VCO. Power Supply for the IF Charge Pump. This should be greater than or equal to V DD2. In systems where VDD2 is 3 V, it can be set to 6 V and used to drive a VCO with a tuning range up to 6 V. Power Supply for the IF, Digital and Interface Section. Decoupling capacitors to the ground plane should be placed as close as possible to this pin. V DD2 should have a value of between 2.7 V and 5.5 V. VDD2 must have the same potential as V DD1. |
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1PCS | 100PCS | 1K | 10K | |||
价 格 | ||||||
型 号:3314J-1-103E 厂 家:3314J-1-103E 封 装:标准封装 批 号:0902+ 数 量:175 说 明:
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