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| FP12-200资料 | |
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FP12-200 PDF Download |
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File Size : 116 KB
Manufacturer:TRIAD Description:The K7A803609B and K7A801809B are 9,437,184-bit Syn- chronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. It is organized as 256K(512K) words of 36(18) bits and inte- grates address and control registers, a 2-bit burst address counter and added some new functions for high perfor- mance cache RAM applications; GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address status processor(ADSP) or address status cache controller(ADSC) inputs. Subsequent burst addresses are generated inter- nally in the systems burst sequence and are controlled by the burst address advance(ADV) input. LBO pin is DC operated and determines burst sequence(lin- ear or interleaved). ZZ pin controls Power Down State and reduces Stand-by current regardless of CLK. The K7A803609B and K7A801809B are fabricated using SAMSUNGs high performance CMOS technology and is available in a 100pin TQFP and Multiple power and ground pins are utilized to minimize ground bounce. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：FP12-200 厂 家：TRIAD 封 装： 批 号：07+ 数 量：7131 说 明：原装正品 |
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运 费：所有运费均有我司承担 所在地：深圳 新旧程度： |
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| 联系人：申小姐 |
| 电 话：0755-83330991,0755-83047629 |
| 手 机：15811820920 |
| QQ：2355514181 |
| MSN：chipstech-int@hotmail.com |
| 传 真：0755-61658118 |
| EMail：sales@chipstech-int.com |
| 公司地址： 深圳市福田区中航路鼎城国际1017 |
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1. 所有我司提供的货物，均为原厂原装正品！ 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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