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SN74LVC646ADBR资料 | |
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SN74LVC646ADBR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the four latches, the relevant latch is selected using the control bits. Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is a high impedance CMOS input. Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input. Chip Enable. A logic low on this pin powers down the device and puts the charge pump into three state mode. Taking the pin high will power up the device depending on the status of the power-down bits. Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and a dc equivalent input resistance of 100kΩ. See Figure 2. This input can be driven from a TTL or CMOS crystal oscillator or it can be ac coupled. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:SN74LVC646ADBR 厂 家:TI 封 装: 批 号:07+ 数 量:18571 说 明:原装正品 |
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运 费:所有运费均有我司承担 所在地:深圳 新旧程度: |
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