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SN74LVCC3245APWR资料 | |
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SN74LVCC3245APWR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:Twenty-two address bits are required to decode 1 of 4 194 304 storage cell locations. Eleven row-address bits are set up on inputs A0 through A10 and latched onto the chip by the row-address strobe (RAS). The eleven column-address bits are set up on A0 through A10 and latched onto the chip by the column-address strobe (CAS). All addresses must be stable on or before the falling edges of RAS and CAS. RAS is similar to a chip enable in that it activates the sense amplifiers as well as the row decoder. CAS is used as a chip select, activating the output buffer, as well as latching the address bits into the column-address buffer. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:SN74LVCC3245APWR 厂 家:TI 封 装: 批 号:07+ 数 量:37167 说 明:原装正品 |
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运 费:所有运费均有我司承担 所在地:深圳 新旧程度: |
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