![]() |
|||||||
|
|||||||
![]() |
SN75C3232DBR资料 | |
![]() |
SN75C3232DBR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:The SN75C3232DBRSXL power management structure includes a number of power saving mechanisms that can be combined to achieve comprehensive power savings under a variety of system conditions. First of all, the core processor power con- sumption can be controlled by varying the processor/system clock frequency. The internal CPU clock can be divided by 4, 8, 16, 32 or 64. In addition, in idle mode, the internal proces- sor clock will be disabled. Finally, if an external crystal oscil- lator circuit is being used, it can be disabled. For maximum power savings, all internal clocks can be disabled (except for the real-time clock oscillator). The clocks of the on-board peripherals can be individually or globally controlled. By setting bits in the power management control registers, the internal clocks to the three-wire inter- face, the timer, the DRAM controller, and the UART can be disabled. In addition to these internal clocks, the external SYSCLK can be disabled via a bit in the power management control regis- ters. |
相关型号 | |
◆ PJ-037A-SMT | |
◆ FZT591ATA | |
◆ 2-520081-2 | |
◆ 2-520103-2 | |
◆ G3VM21GR | |
◆ B40B-XADSS-N(LF)(SN) | |
◆ S301T-RO | |
◆ 172339-1 | |
◆ V7-5F17D8-336 | |
◆ 44441-2002 |
1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:SN75C3232DBR 厂 家:TI 封 装: 批 号:07+ 数 量:8273 说 明:原装正品 |
|||||
运 费:所有运费均有我司承担 所在地:深圳 新旧程度: |
|||||
联系人:申小姐 |
电 话:0755-83330991,0755-83047629 |
手 机:15811820920 |
QQ:2355514181 |
MSN:chipstech-int@hotmail.com |
传 真:0755-61658118 |
EMail:sales@chipstech-int.com |
公司地址: 深圳市福田区中航路鼎城国际1017 |
1. 所有我司提供的货物,均为原厂原装正品! 2. 我们的报价是不含税价格。含税需要增加相应的税点。
|