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| TFP403PZP资料 | |
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TFP403PZP PDF Download |
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File Size : 116 KB
Manufacturer:TI Description:Parameter is tested as part of design characterization or after design changes. Thereafter, parameter shall be guaranteed to the limits specified. Parameter verified during line and load regulation tests. Output load current must be distributed such that at least 20% of the total load current is being provided by one of the outputs. Load current split equally between outputs on dual output models. Cross regulation is measured with 20% rated load on output under test while changing the load on the other output from 20% to 80% of rated. Guaranteed for a D.C. to 20MHz bandwidth. Tested using a 20KHz to 10MHz bandwidth using the circuit shown below. Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum limit may interfere with the proper operation of the converters overload protection, causing erratic behavior during turn-on. Overload power dissipation is defined as the device power dissipation with the load set such that VOUT = 90% of nominal. Load step transition time 10 µSec. Recovery time is measured from the initiation of the transient to where VOUT has returned to within 1% of its steady state value. Line step transition time 100 µSec. Turn-on delay time from either a step application of input power or a logic low to a logic high transition on the inhibit pin (pin 4) to the point where VOUT = 90% of nominal. For operation at temperatures between +85C and +125C, derate the maximum output power linearly from 100% to 75%. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：TFP403PZP 厂 家：TI 封 装： 批 号：07+ 数 量：18665 说 明：原装正品 |
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运 费：所有运费均有我司承担 所在地：深圳 新旧程度： |
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| 联系人：申小姐 |
| 电 话：0755-83330991,0755-83047629 |
| 手 机：15811820920 |
| QQ：2355514181 |
| MSN：chipstech-int@hotmail.com |
| 传 真：0755-61658118 |
| EMail：sales@chipstech-int.com |
| 公司地址： 深圳市福田区中航路鼎城国际1017 |
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1. 所有我司提供的货物，均为原厂原装正品！ 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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