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| THS1403IPFB资料 | |
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THS1403IPFB PDF Download |
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File Size : 116 KB
Manufacturer:TI Description: I A LOW on this pin initializes the FIFO2 read and write pointers to the first location of memory and sets the Port A output register to all zeroes. A LOW-to-HIGH transition on MRS2 toggled simultaneously with MRS1, selects the programming method (serial or parallel) and one of the three flag default offsets for FIFO2. Four LOW-to-HIGH transitions of CLKA and four LOW-to-HIGH transitions of CLKC must occur while MRS2 is LOW. I A LOW on this pin initializes the FIFO1 read and write pointers to the first location of memory and sets the Port B output register to all zeroes. During Partial Reset, the currently selected bus size, endian arrangement, programming method (serial or parallel), and programmable flag settings are all retained. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：THS1403IPFB 厂 家：TI 封 装：48-TQFP 批 号：07+ 数 量：6927 说 明：原装正品 |
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运 费：所有运费均有我司承担 所在地：深圳 新旧程度： |
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