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| TLE2064AID资料 | |
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TLE2064AID PDF Download |
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File Size : 116 KB
Manufacturer:TI Description:The device requires an input clock at half the DAC conversion rate as each DAC core is clocked on both edges of the input clock. Each DAC core can be regarded as two interleaved DACs, each running at half rate. The main reason for adopting this approach is that the switch driver inherently includes a multiplex function through its two input ports. Compared to a conventional switch driver this allows twice as long to acquire and convert, though because the two paths share current sources they match exactly at low frequencies. A characteristic of this architecture is a suppressed image appearing reflected about Fs(dac)/4 of Fclk-Fsig. Duty cycle error in the input clock will exacerbate this image, but can be minimised by trimming the differential DC offset at the clock input pins. |
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| ◆ 44441-2002 | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：TLE2064AID 厂 家：TI 封 装： 批 号：07+ 数 量：37388 说 明：原装正品 |
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运 费：所有运费均有我司承担 所在地：深圳 新旧程度： |
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| 联系人：申小姐 |
| 电 话：0755-83330991,0755-83047629 |
| 手 机：15811820920 |
| QQ：2355514181 |
| MSN：chipstech-int@hotmail.com |
| 传 真：0755-61658118 |
| EMail：sales@chipstech-int.com |
| 公司地址： 深圳市福田区中航路鼎城国际1017 |
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1. 所有我司提供的货物，均为原厂原装正品！ 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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