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TLV2474AIPWPR资料 | |
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TLV2474AIPWPR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:TLV2474AIPWPR 厂 家:TI 封 装: 批 号:07+ 数 量:35752 说 明:原装正品 |
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运 费:所有运费均有我司承担 所在地:深圳 新旧程度: |
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1. 所有我司提供的货物,均为原厂原装正品! 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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