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| TLV320AIC14KIDBTR资料 | |
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TLV320AIC14KIDBTR PDF Download |
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File Size : 116 KB
Manufacturer:TI Description:The direct connects allow immediate connections to neigh- boring CLBs, once again without using any of the general interconnect. These two layers of local routing resource improve the granularity of the architecture, effectively mak- ing the XC5200 family a sea of logic cells. Each Versa-Block has four 3-state buffers that share a common enable line and directly drive horizontal and vertical Lon- glines, creating robust on-chip bussing capability. The VersaBlock allows fast, local implementation of logic func- tions, effectively implementing user designs in a hierarchi- cal fashion. These resources also minimize local routing congestion and improve the efficiency of the general inter- connect, which is used for connecting larger groups of logic. It is this combination of both fine-grain and coarse-grain architecture attributes that maximize logic uti- lization in the XC5200 family. This symmetrical structure takes full advantage of the third metal layer, freeing the placement software to pack user logic optimally with mini- mal routing restrictions. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：TLV320AIC14KIDBTR 厂 家：TI 封 装： 批 号：07+ 数 量：7260 说 明：原装正品 |
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运 费：所有运费均有我司承担 所在地：深圳 新旧程度： |
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| 联系人：申小姐 |
| 电 话：0755-83330991,0755-83047629 |
| 手 机：15811820920 |
| QQ：2355514181 |
| MSN：chipstech-int@hotmail.com |
| 传 真：0755-61658118 |
| EMail：sales@chipstech-int.com |
| 公司地址： 深圳市福田区中航路鼎城国际1017 |
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1. 所有我司提供的货物，均为原厂原装正品！ 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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