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TLV3402IDGKR资料 | |
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TLV3402IDGKR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:In-system programmable 3.3V PROMs for configuration of Xilinx FPGAs - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range IEEE Std 1149.1 boundary-scan (JTAG) support Simple interface to the FPGA; could be configured to use only one user I/O pin Cascadable for storing longer or multiple bitstreams Dual configuration modes - Serial Slow/Fast configuration (up to 15 mHz). - Parallel Low-power advanced CMOS FLASH process 5 V tolerant I/O pins accept 5 V, 3.3 V and 2.5 V signals. 3.3 V or 2.5 V output capability Available in PC20, SO20, PC44 and VQ44 packages. Design support using the Xilinx Alliance and Foundation series software packages. JTAG command initiation of standard FPGA configuration. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:TLV3402IDGKR 厂 家:TI 封 装: 批 号:07+ 数 量:94239 说 明:原装正品 |
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运 费:所有运费均有我司承担 所在地:深圳 新旧程度: |
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公司地址: 深圳市福田区中航路鼎城国际1017 |
1. 所有我司提供的货物,均为原厂原装正品! 2. 我们的报价是不含税价格。含税需要增加相应的税点。
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