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TLV5613IPWR

TLV5613IPWR资料
TLV5613IPWR
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File Size : 116 KB
Manufacturer:TI
Description:SW(Pin 9): This is the drain of the internal NMOS power switch. Minimize the metal trace area connected to this pin to minimize EMI. VIN(Pin 10): Input Supply Pin. Bypass this pin with a capaci- tor as close to the device as possible. The capacitor should connect between VIN and PGND. SWI(Pin 11): PMOS switch input. Source connection of PMOS device. SWO(Pin 12): PMOS switch output. Drain connection of PMOS device. SWC(Pin13): PMOS switch control pin. This pin creates an AND function with the delay time after the output of the switching regulator has reached 85% of its nominal value. To ensure the PMOS switch is in the correct state, apply a voltage above 1.5V to this pin to turn on the PMOS switch and apply a voltage below 0.7V to turn off the PMOS switch. AVIN(Pin 14): Supply pin for the Vcom opamp and the Gamma buffer. Bypass this pin with a capacitor as close to the device as possible, about 100nF, if connected directly to the output of the boost DC/DC switching regulator. The capacitor should connect between AVIN and PGND. GMA(Pin 15): Gamma Buffer output pin. GMA+(Pin 16): Gamma Buffer input pin.
 
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型 号:TLV5613IPWR
厂 家:TI
封 装:
批 号:07+
数 量:7406
说 明:原装正品
 
 
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